1. Field of the Invention
This invention relates to an improvement in devices for electrically testing high performance integrated circuit devices or chips, and in one aspect to an improved test socket for supporting the chip, whether on tape or not, free of detrimental effect on the device or tape and affording rapid facile positive electrical connection with the contact points of said device.
2. Description of the Prior Art
As the development of integrated circuit devices continues, i.e. "chips", to provide in a single chip more and more capability, they result in more, and more, and more closely spaced contact points for electrically connecting circuits to a chip. It is always a step in the manufacture to test the chips. Performance of a chip is tested by placing each chip in a test fixture or test socket and connecting all of the contact points electrically to the test fixture such that a series of tests may be run on each of the modes of operation to determine the quality of the chip. As the contact points become located closer and closer together it has become increasingly difficult to design a test socket which has hard wired contacts close enough together to assure contact with the individual contact points of the chip, and such test sockets are not suitable for testing integrated circuit devices packaged on a tape. Examples of such test sockets are present in U.S. Pat. Nos. 3,551,878; 3,914,007; 4,130,327; 4,508,403; 4,541,676; and application Ser. No. 643,237, filed Aug. 22, 1984, and assigned to the assignee of this application. Thus, with the development of technologies for chip-on-tape manufacture it was necessary to also be able to test the chips on the tape requiring registration with and surface contact to each of the contact points of such chips. To do this requires high density terminals in the test socket which were not easily afforded by the mechanical fixturing of the test sockets. The requirements for chip-on-tape testing of chips having high density contact points required the carrier tape handling capability, a hot test capability, an intelligent operator interface, quick load and unload of tape and flexibility as to the set up for different chip-on-tape formats.
The present invention provides a manual tape test station having strip or tape handling capability or individual chip handling capability, hot test capability, an intelligent operator interface which provides for the location of the chip, quick load and unload of the chip and adapted for change from one chip format to another.